A) F3 B) F2 C) F1
A) 1ΚΩ B) 5k C) 10ΚΩ D) 220k
A) 1µF B) 10V C) 0V D) 5V
A) 1ns B) 3 C) 1 D) 2ns
A) 5ms B) 100ms C) 10ms D) 20ms
A) Pulse B) .op C) .meas D) .tran
A) Using cursor differences in voltage vs. time plot B) None of them C) transient analysis
A) An exponential decay curve. B) Exponential rise C) Exponential rise to steady state
A) C x R B) R-C C) R/C D) R x C
A) 0Hz B) 1Hz C) 5Hz D) -1Hz
A) 120 B) 50 C) 100 D) 10
A) Low frequency B) Highest frequency C) 1MHz D) 2MHz
A) Bode plot B) High frequency C) gain D) Frequency
A) half of its maximum power. B) Half point (0.70 of peak amplitude) C) Half power point (0.707 of peak amplitude)
A) 220V B) 12V C) 170 V peak D) 120V
A) 2200µF B) 10μF C) 100μF D) 1000μF
A) Bridge configuration with four diodes B) Bridge rectifier C) Bridge configuration with two diodes
A) difference between the maximum and minimm voltage B) None of them C) Peak-to-peak voltage measurement
A) Input power x output power B) Input power / output power x 100% C) Output power / Input power × 100%
A) LT1001 B) LM741 C) LM1001 D) LT101
A) ±15V B) 15V C) -15V D) 5V
A) 10 B) 13 C) 11 D) 12
A) 1V sine wave B) All of the above C) 2V sine wave D) 1 V peak sine wave
A) Bandwidth B) Sine wave C) Frequency at 3dB point from midband gain D) Frequency at -3dB point from midband gain
A) 20ΚΩ B) 120Ω C) 1ΚΩ D) 10ΚΩ
A) CMRR B) High Input Impedance C) Low Output Impedance
A) 10ΚΩ B) 1ΚΩ C) 120 D) 220
A) Apply a common-mode signal B) Identical signals applied to both inputs C) difference amplifier configuration
A) Connect the inputs B) Output voltage / differential input voltage C) Apply a small differential input Vd=V-V-VdV+ -V
A) drops by 3dB B) drops by -3dB C) 1kHz D) 10kHz
A) VCVS filter topology B) Sallen-Key C) Swollen-key
A) -90 degrees B) -90 Celsius C) 80 degrees D) -120 degrees
A) -40 dB/decade B) All of the above C) 4 dB/decade D) Filter order (n) or slope in dB/decade
A) 0.770 B) 0.707 C) 0.7777 D) 0707
A) 12V B) 15V C) 5V D) ±15V
A) 1ΚΩ B) 2kΩ C) 100Ω
A) 120V B) 5V C) 12V D) 15V
A) Power supply B) AVout/Alload C) AIIoad / AVout
A) Power supply B) Series sense resistor with feedback C) Parallel sense resistor with feedback
A) Wien bridge B) Colpitts Oscillator C) Phase-Shift Oscillator D) Clap Oscillator
A) Period and frequency B) RC time constant C) Frequency-selective componentsi
A) Use oscilloscope to see how the output frequency changes B) Use a frequency counter C) Amplitude stabilizer D) AGC circuit with thermistor
A) Use a frequency counter B) Long-term frequency drift measurement C) oscilloscope to see how the output frequency changes
A) Exponential amplitude growth to steady state B) Closed loop gain C) Across the resistance
A) 100kHz B) 15KHz C) 1kHz D) 50KHz
A) negative feedback control B) PWM feedback control C) Voltage-Mode Control (VMC)
A) Pout x Pin x 100% B) (Pout/Pin) x 100% C) (Pin/Pout) x 100%
A) Output voltage not settling time B) Output voltage settling time C) Damping ration
A) 1μΗ B) 1000μΗ C) 100μΗ D) 10μΗ
A) Monte Carlo B) Tolerance Analysis C) AC analysis D) transient analysis
A) Using . Meas command B) Using Netlist C) Using.subckt definition D) CAD
A) .param B) .tran C) .op D) .meas
A) SPICE compatible text format B) Plain Text C) SPICE compatible image format
A) Symbol creation with subcircuits B) All of the above C) Top down design D) Visual hierarchy
A) Minimum timestep = 100 of smallest time constant B) Maximum timestep = 1/100 of Highest time constant C) Maximum timestep = 1/100 of smallest time constant
A) gmin=1e B) min= 1-9 C) .options D) min= 1e-9 E) gmin = 1e-9
A) .param B) .ic command with node voltages C) .TRAN D) .step
A) Reltol B) Reltol 1e-12 C) abstol 1e-12 D) abstol
A) Reduce increment size B) Modify gmin stepping C) Refine the mesh D) Tighten Convergence Settings
A) File Export command from the Plot Pane B) Left-click plot, export data as text C) Right-click plot, export data as text
A) .MEAS B) node1 C) V(node1)-V(node2) D) Node2
A) .op B) .param C) .meas tran rms RMS V(out) D) .tran
A) .op B) .tran C) .fft V(out) D) .AC
A) .meas avg power = avg (V(n1)*I(R1)) B) .tran C) .param D) .MEAS P_AVG AVG V(R1)*I(R1) E) .AC
A) Comment Text for descriptive labels and Net Name Labels/Ports B) Press F4 or the “label net" C) Hierarchical prefix with functional description D) Prefix with functional description
A) Rename the schematic B) SPICE directives with comments C) using a text file to document D) Add comments
A) Dedicated folder for each individual circuit project B) My Documents\LTspiceXVII C) Separate folders for each analysis type
A) Clarity, functionality, and portability B) .measure C) ProjectName_CircuitType_Version
A) Sequential backup with date stamps B) External Version Control System (VCS) C) use the .step param command
A) Systematic node voltage checking B) Verification vs. Validation C) Systematic, multi-analysis comparison
A) Error log analysis and stepping B) Check for syntax and units C) SPICE Error Log and the Waveform Viewer
A) Cross-Verification B) Theoretical calculation comparison
A) Progressive component addition B) Systematic process
A) Comparison of simulation results against unknown datasheet parameters B) Comparison with datasheet specifications
A) 1uF B) 1000uF C) 100uF |