A) F3 B) F2 C) F1
A) 10ΚΩ B) 220k C) 5k D) 1ΚΩ
A) 0V B) 5V C) 10V D) 1µF
A) 1ns B) 3 C) 1 D) 2ns
A) 10ms B) 100ms C) 5ms D) 20ms
A) Pulse B) .op C) .tran D) .meas
A) transient analysis B) Using cursor differences in voltage vs. time plot C) None of them
A) An exponential decay curve. B) Exponential rise C) Exponential rise to steady state
A) R/C B) R x C C) R-C D) C x R
A) 0Hz B) -1Hz C) 5Hz D) 1Hz
A) 100 B) 10 C) 120 D) 50
A) 2MHz B) Highest frequency C) Low frequency D) 1MHz
A) Frequency B) High frequency C) gain D) Bode plot
A) half of its maximum power. B) Half power point (0.707 of peak amplitude) C) Half point (0.70 of peak amplitude)
A) 170 V peak B) 220V C) 120V D) 12V
A) 10μF B) 100μF C) 1000μF D) 2200µF
A) Bridge configuration with two diodes B) Bridge rectifier C) Bridge configuration with four diodes
A) difference between the maximum and minimm voltage B) None of them C) Peak-to-peak voltage measurement
A) Input power x output power B) Input power / output power x 100% C) Output power / Input power × 100%
A) LT101 B) LM1001 C) LM741 D) LT1001
A) 5V B) ±15V C) -15V D) 15V
A) 11 B) 12 C) 10 D) 13
A) 2V sine wave B) 1 V peak sine wave C) All of the above D) 1V sine wave
A) Bandwidth B) Frequency at 3dB point from midband gain C) Frequency at -3dB point from midband gain D) Sine wave
A) 20ΚΩ B) 120Ω C) 1ΚΩ D) 10ΚΩ
A) High Input Impedance B) Low Output Impedance C) CMRR
A) 1ΚΩ B) 120 C) 10ΚΩ D) 220
A) Identical signals applied to both inputs B) difference amplifier configuration C) Apply a common-mode signal
A) Output voltage / differential input voltage B) Apply a small differential input Vd=V-V-VdV+ -V C) Connect the inputs
A) drops by -3dB B) drops by 3dB C) 1kHz D) 10kHz
A) Sallen-Key B) VCVS filter topology C) Swollen-key
A) 80 degrees B) -120 degrees C) -90 Celsius D) -90 degrees
A) Filter order (n) or slope in dB/decade B) All of the above C) -40 dB/decade D) 4 dB/decade
A) 0.707 B) 0707 C) 0.7777 D) 0.770
A) 15V B) 12V C) 5V D) ±15V
A) 100Ω B) 1ΚΩ C) 2kΩ
A) 5V B) 12V C) 120V D) 15V
A) Power supply B) AIIoad / AVout C) AVout/Alload
A) Parallel sense resistor with feedback B) Series sense resistor with feedback C) Power supply
A) Wien bridge B) Clap Oscillator C) Phase-Shift Oscillator D) Colpitts Oscillator
A) Frequency-selective componentsi B) Period and frequency C) RC time constant
A) AGC circuit with thermistor B) Use oscilloscope to see how the output frequency changes C) Amplitude stabilizer D) Use a frequency counter
A) Use a frequency counter B) Long-term frequency drift measurement C) oscilloscope to see how the output frequency changes
A) Across the resistance B) Exponential amplitude growth to steady state C) Closed loop gain
A) 50KHz B) 100kHz C) 15KHz D) 1kHz
A) negative feedback control B) Voltage-Mode Control (VMC) C) PWM feedback control
A) Pout x Pin x 100% B) (Pin/Pout) x 100% C) (Pout/Pin) x 100%
A) Output voltage not settling time B) Damping ration C) Output voltage settling time
A) 100μΗ B) 1μΗ C) 10μΗ D) 1000μΗ
A) Tolerance Analysis B) transient analysis C) AC analysis D) Monte Carlo
A) Using Netlist B) CAD C) Using.subckt definition D) Using . Meas command
A) .op B) .param C) .meas D) .tran
A) Plain Text B) SPICE compatible text format C) SPICE compatible image format
A) All of the above B) Symbol creation with subcircuits C) Top down design D) Visual hierarchy
A) Maximum timestep = 1/100 of Highest time constant B) Maximum timestep = 1/100 of smallest time constant C) Minimum timestep = 100 of smallest time constant
A) min= 1-9 B) gmin = 1e-9 C) gmin=1e D) .options E) min= 1e-9
A) .param B) .TRAN C) .ic command with node voltages D) .step
A) Reltol 1e-12 B) abstol 1e-12 C) Reltol D) abstol
A) Tighten Convergence Settings B) Refine the mesh C) Modify gmin stepping D) Reduce increment size
A) File Export command from the Plot Pane B) Right-click plot, export data as text C) Left-click plot, export data as text
A) V(node1)-V(node2) B) node1 C) .MEAS D) Node2
A) .tran B) .op C) .param D) .meas tran rms RMS V(out)
A) .tran B) .AC C) .fft V(out) D) .op
A) .MEAS P_AVG AVG V(R1)*I(R1) B) .tran C) .param D) .AC E) .meas avg power = avg (V(n1)*I(R1))
A) Comment Text for descriptive labels and Net Name Labels/Ports B) Hierarchical prefix with functional description C) Prefix with functional description D) Press F4 or the “label net"
A) SPICE directives with comments B) Rename the schematic C) Add comments D) using a text file to document
A) My Documents\LTspiceXVII B) Dedicated folder for each individual circuit project C) Separate folders for each analysis type
A) Clarity, functionality, and portability B) .measure C) ProjectName_CircuitType_Version
A) External Version Control System (VCS) B) Sequential backup with date stamps C) use the .step param command
A) Verification vs. Validation B) Systematic node voltage checking C) Systematic, multi-analysis comparison
A) Check for syntax and units B) SPICE Error Log and the Waveform Viewer C) Error log analysis and stepping
A) Cross-Verification B) Theoretical calculation comparison
A) Systematic process B) Progressive component addition
A) Comparison of simulation results against unknown datasheet parameters B) Comparison with datasheet specifications
A) 100uF B) 1000uF C) 1uF |