A) F3 B) F1 C) F2
A) 10ΚΩ B) 220k C) 1ΚΩ D) 5k
A) 1µF B) 5V C) 0V D) 10V
A) 1 B) 3 C) 1ns D) 2ns
A) 100ms B) 5ms C) 20ms D) 10ms
A) .tran B) Pulse C) .op D) .meas
A) transient analysis B) Using cursor differences in voltage vs. time plot C) None of them
A) Exponential rise B) Exponential rise to steady state C) An exponential decay curve.
A) C x R B) R x C C) R/C D) R-C
A) -1Hz B) 0Hz C) 1Hz D) 5Hz
A) 10 B) 120 C) 100 D) 50
A) Low frequency B) 1MHz C) 2MHz D) Highest frequency
A) gain B) Bode plot C) Frequency D) High frequency
A) half of its maximum power. B) Half power point (0.707 of peak amplitude) C) Half point (0.70 of peak amplitude)
A) 220V B) 170 V peak C) 12V D) 120V
A) 1000μF B) 100μF C) 2200µF D) 10μF
A) Bridge configuration with two diodes B) Bridge rectifier C) Bridge configuration with four diodes
A) None of them B) Peak-to-peak voltage measurement C) difference between the maximum and minimm voltage
A) Output power / Input power × 100% B) Input power x output power C) Input power / output power x 100%
A) LM1001 B) LT101 C) LM741 D) LT1001
A) -15V B) 5V C) 15V D) ±15V
A) 10 B) 13 C) 12 D) 11
A) 1V sine wave B) 1 V peak sine wave C) All of the above D) 2V sine wave
A) Frequency at 3dB point from midband gain B) Frequency at -3dB point from midband gain C) Bandwidth D) Sine wave
A) 20ΚΩ B) 120Ω C) 10ΚΩ D) 1ΚΩ
A) Low Output Impedance B) High Input Impedance C) CMRR
A) 1ΚΩ B) 120 C) 220 D) 10ΚΩ
A) difference amplifier configuration B) Apply a common-mode signal C) Identical signals applied to both inputs
A) Output voltage / differential input voltage B) Connect the inputs C) Apply a small differential input Vd=V-V-VdV+ -V
A) 10kHz B) drops by -3dB C) drops by 3dB D) 1kHz
A) Sallen-Key B) VCVS filter topology C) Swollen-key
A) -90 degrees B) -90 Celsius C) 80 degrees D) -120 degrees
A) -40 dB/decade B) All of the above C) 4 dB/decade D) Filter order (n) or slope in dB/decade
A) 0.7777 B) 0707 C) 0.770 D) 0.707
A) 5V B) ±15V C) 15V D) 12V
A) 2kΩ B) 1ΚΩ C) 100Ω
A) 5V B) 120V C) 15V D) 12V
A) AIIoad / AVout B) AVout/Alload C) Power supply
A) Power supply B) Series sense resistor with feedback C) Parallel sense resistor with feedback
A) Wien bridge B) Colpitts Oscillator C) Phase-Shift Oscillator D) Clap Oscillator
A) Frequency-selective componentsi B) RC time constant C) Period and frequency
A) AGC circuit with thermistor B) Use oscilloscope to see how the output frequency changes C) Amplitude stabilizer D) Use a frequency counter
A) Long-term frequency drift measurement B) oscilloscope to see how the output frequency changes C) Use a frequency counter
A) Exponential amplitude growth to steady state B) Across the resistance C) Closed loop gain
A) 15KHz B) 1kHz C) 50KHz D) 100kHz
A) negative feedback control B) PWM feedback control C) Voltage-Mode Control (VMC)
A) (Pin/Pout) x 100% B) (Pout/Pin) x 100% C) Pout x Pin x 100%
A) Output voltage settling time B) Damping ration C) Output voltage not settling time
A) 100μΗ B) 1000μΗ C) 1μΗ D) 10μΗ
A) Tolerance Analysis B) AC analysis C) transient analysis D) Monte Carlo
A) CAD B) Using Netlist C) Using.subckt definition D) Using . Meas command
A) .param B) .tran C) .op D) .meas
A) SPICE compatible text format B) SPICE compatible image format C) Plain Text
A) Top down design B) All of the above C) Visual hierarchy D) Symbol creation with subcircuits
A) Minimum timestep = 100 of smallest time constant B) Maximum timestep = 1/100 of smallest time constant C) Maximum timestep = 1/100 of Highest time constant
A) min= 1e-9 B) gmin=1e C) .options D) min= 1-9 E) gmin = 1e-9
A) .param B) .step C) .ic command with node voltages D) .TRAN
A) Reltol 1e-12 B) abstol C) Reltol D) abstol 1e-12
A) Modify gmin stepping B) Reduce increment size C) Tighten Convergence Settings D) Refine the mesh
A) Left-click plot, export data as text B) File Export command from the Plot Pane C) Right-click plot, export data as text
A) .MEAS B) V(node1)-V(node2) C) node1 D) Node2
A) .tran B) .op C) .param D) .meas tran rms RMS V(out)
A) .fft V(out) B) .op C) .AC D) .tran
A) .tran B) .MEAS P_AVG AVG V(R1)*I(R1) C) .AC D) .meas avg power = avg (V(n1)*I(R1)) E) .param
A) Press F4 or the “label net" B) Prefix with functional description C) Comment Text for descriptive labels and Net Name Labels/Ports D) Hierarchical prefix with functional description
A) Add comments B) using a text file to document C) Rename the schematic D) SPICE directives with comments
A) Separate folders for each analysis type B) Dedicated folder for each individual circuit project C) My Documents\LTspiceXVII
A) ProjectName_CircuitType_Version B) .measure C) Clarity, functionality, and portability
A) Sequential backup with date stamps B) External Version Control System (VCS) C) use the .step param command
A) Systematic, multi-analysis comparison B) Systematic node voltage checking C) Verification vs. Validation
A) Error log analysis and stepping B) Check for syntax and units C) SPICE Error Log and the Waveform Viewer
A) Cross-Verification B) Theoretical calculation comparison
A) Progressive component addition B) Systematic process
A) Comparison with datasheet specifications B) Comparison of simulation results against unknown datasheet parameters
A) 1uF B) 1000uF C) 100uF |