A) F2 B) F3 C) F1
A) 10ΚΩ B) 220k C) 1ΚΩ D) 5k
A) 5V B) 10V C) 1µF D) 0V
A) 1 B) 2ns C) 3 D) 1ns
A) 100ms B) 10ms C) 20ms D) 5ms
A) .meas B) .op C) .tran D) Pulse
A) None of them B) Using cursor differences in voltage vs. time plot C) transient analysis
A) Exponential rise B) An exponential decay curve. C) Exponential rise to steady state
A) R/C B) R x C C) R-C D) C x R
A) 5Hz B) 1Hz C) 0Hz D) -1Hz
A) 100 B) 10 C) 120 D) 50
A) 1MHz B) Low frequency C) Highest frequency D) 2MHz
A) Bode plot B) High frequency C) gain D) Frequency
A) half of its maximum power. B) Half power point (0.707 of peak amplitude) C) Half point (0.70 of peak amplitude)
A) 12V B) 220V C) 170 V peak D) 120V
A) 2200µF B) 10μF C) 100μF D) 1000μF
A) Bridge configuration with two diodes B) Bridge configuration with four diodes C) Bridge rectifier
A) None of them B) Peak-to-peak voltage measurement C) difference between the maximum and minimm voltage
A) Input power x output power B) Input power / output power x 100% C) Output power / Input power × 100%
A) LT1001 B) LT101 C) LM1001 D) LM741
A) 15V B) 5V C) ±15V D) -15V
A) 12 B) 10 C) 13 D) 11
A) 1 V peak sine wave B) 1V sine wave C) All of the above D) 2V sine wave
A) Bandwidth B) Frequency at 3dB point from midband gain C) Frequency at -3dB point from midband gain D) Sine wave
A) 10ΚΩ B) 1ΚΩ C) 120Ω D) 20ΚΩ
A) Low Output Impedance B) CMRR C) High Input Impedance
A) 220 B) 1ΚΩ C) 120 D) 10ΚΩ
A) Apply a common-mode signal B) difference amplifier configuration C) Identical signals applied to both inputs
A) Output voltage / differential input voltage B) Apply a small differential input Vd=V-V-VdV+ -V C) Connect the inputs
A) 1kHz B) 10kHz C) drops by -3dB D) drops by 3dB
A) Sallen-Key B) VCVS filter topology C) Swollen-key
A) 80 degrees B) -120 degrees C) -90 Celsius D) -90 degrees
A) Filter order (n) or slope in dB/decade B) 4 dB/decade C) All of the above D) -40 dB/decade
A) 0.7777 B) 0.770 C) 0707 D) 0.707
A) 5V B) 12V C) ±15V D) 15V
A) 1ΚΩ B) 100Ω C) 2kΩ
A) 12V B) 15V C) 5V D) 120V
A) AVout/Alload B) AIIoad / AVout C) Power supply
A) Series sense resistor with feedback B) Parallel sense resistor with feedback C) Power supply
A) Phase-Shift Oscillator B) Wien bridge C) Colpitts Oscillator D) Clap Oscillator
A) Period and frequency B) RC time constant C) Frequency-selective componentsi
A) AGC circuit with thermistor B) Use a frequency counter C) Amplitude stabilizer D) Use oscilloscope to see how the output frequency changes
A) oscilloscope to see how the output frequency changes B) Use a frequency counter C) Long-term frequency drift measurement
A) Exponential amplitude growth to steady state B) Closed loop gain C) Across the resistance
A) 1kHz B) 100kHz C) 15KHz D) 50KHz
A) Voltage-Mode Control (VMC) B) PWM feedback control C) negative feedback control
A) (Pout/Pin) x 100% B) Pout x Pin x 100% C) (Pin/Pout) x 100%
A) Output voltage settling time B) Damping ration C) Output voltage not settling time
A) 1000μΗ B) 10μΗ C) 1μΗ D) 100μΗ
A) Monte Carlo B) Tolerance Analysis C) transient analysis D) AC analysis
A) CAD B) Using Netlist C) Using.subckt definition D) Using . Meas command
A) .meas B) .param C) .tran D) .op
A) SPICE compatible image format B) Plain Text C) SPICE compatible text format
A) Symbol creation with subcircuits B) Visual hierarchy C) Top down design D) All of the above
A) Maximum timestep = 1/100 of smallest time constant B) Minimum timestep = 100 of smallest time constant C) Maximum timestep = 1/100 of Highest time constant
A) .options B) gmin = 1e-9 C) min= 1-9 D) min= 1e-9 E) gmin=1e
A) .param B) .step C) .TRAN D) .ic command with node voltages
A) Reltol 1e-12 B) abstol 1e-12 C) abstol D) Reltol
A) Refine the mesh B) Tighten Convergence Settings C) Modify gmin stepping D) Reduce increment size
A) Left-click plot, export data as text B) File Export command from the Plot Pane C) Right-click plot, export data as text
A) .MEAS B) Node2 C) V(node1)-V(node2) D) node1
A) .meas tran rms RMS V(out) B) .param C) .tran D) .op
A) .fft V(out) B) .op C) .tran D) .AC
A) .param B) .AC C) .MEAS P_AVG AVG V(R1)*I(R1) D) .tran E) .meas avg power = avg (V(n1)*I(R1))
A) Press F4 or the “label net" B) Prefix with functional description C) Hierarchical prefix with functional description D) Comment Text for descriptive labels and Net Name Labels/Ports
A) Add comments B) using a text file to document C) SPICE directives with comments D) Rename the schematic
A) My Documents\LTspiceXVII B) Separate folders for each analysis type C) Dedicated folder for each individual circuit project
A) .measure B) Clarity, functionality, and portability C) ProjectName_CircuitType_Version
A) Sequential backup with date stamps B) use the .step param command C) External Version Control System (VCS)
A) Systematic, multi-analysis comparison B) Verification vs. Validation C) Systematic node voltage checking
A) Check for syntax and units B) SPICE Error Log and the Waveform Viewer C) Error log analysis and stepping
A) Cross-Verification B) Theoretical calculation comparison
A) Progressive component addition B) Systematic process
A) Comparison with datasheet specifications B) Comparison of simulation results against unknown datasheet parameters
A) 1000uF B) 100uF C) 1uF |