A) F1 B) F2 C) F3
A) 220k B) 5k C) 10ΚΩ D) 1ΚΩ
A) 5V B) 0V C) 1µF D) 10V
A) 1 B) 2ns C) 1ns D) 3
A) 100ms B) 5ms C) 10ms D) 20ms
A) Pulse B) .op C) .meas D) .tran
A) None of them B) transient analysis C) Using cursor differences in voltage vs. time plot
A) Exponential rise B) Exponential rise to steady state C) An exponential decay curve.
A) C x R B) R x C C) R/C D) R-C
A) -1Hz B) 0Hz C) 5Hz D) 1Hz
A) 120 B) 10 C) 50 D) 100
A) 2MHz B) Low frequency C) Highest frequency D) 1MHz
A) Bode plot B) High frequency C) Frequency D) gain
A) half of its maximum power. B) Half power point (0.707 of peak amplitude) C) Half point (0.70 of peak amplitude)
A) 12V B) 120V C) 220V D) 170 V peak
A) 1000μF B) 100μF C) 2200µF D) 10μF
A) Bridge rectifier B) Bridge configuration with two diodes C) Bridge configuration with four diodes
A) difference between the maximum and minimm voltage B) Peak-to-peak voltage measurement C) None of them
A) Input power / output power x 100% B) Output power / Input power × 100% C) Input power x output power
A) LM1001 B) LT101 C) LT1001 D) LM741
A) -15V B) ±15V C) 15V D) 5V
A) 10 B) 11 C) 12 D) 13
A) 1 V peak sine wave B) All of the above C) 2V sine wave D) 1V sine wave
A) Sine wave B) Bandwidth C) Frequency at 3dB point from midband gain D) Frequency at -3dB point from midband gain
A) 120Ω B) 1ΚΩ C) 20ΚΩ D) 10ΚΩ
A) Low Output Impedance B) CMRR C) High Input Impedance
A) 10ΚΩ B) 120 C) 220 D) 1ΚΩ
A) difference amplifier configuration B) Apply a common-mode signal C) Identical signals applied to both inputs
A) Output voltage / differential input voltage B) Apply a small differential input Vd=V-V-VdV+ -V C) Connect the inputs
A) 10kHz B) 1kHz C) drops by -3dB D) drops by 3dB
A) VCVS filter topology B) Sallen-Key C) Swollen-key
A) -120 degrees B) -90 Celsius C) -90 degrees D) 80 degrees
A) 4 dB/decade B) Filter order (n) or slope in dB/decade C) -40 dB/decade D) All of the above
A) 0707 B) 0.707 C) 0.770 D) 0.7777
A) ±15V B) 15V C) 12V D) 5V
A) 100Ω B) 2kΩ C) 1ΚΩ
A) 5V B) 15V C) 120V D) 12V
A) AIIoad / AVout B) AVout/Alload C) Power supply
A) Parallel sense resistor with feedback B) Series sense resistor with feedback C) Power supply
A) Wien bridge B) Phase-Shift Oscillator C) Colpitts Oscillator D) Clap Oscillator
A) Frequency-selective componentsi B) Period and frequency C) RC time constant
A) AGC circuit with thermistor B) Amplitude stabilizer C) Use a frequency counter D) Use oscilloscope to see how the output frequency changes
A) oscilloscope to see how the output frequency changes B) Long-term frequency drift measurement C) Use a frequency counter
A) Closed loop gain B) Across the resistance C) Exponential amplitude growth to steady state
A) 15KHz B) 1kHz C) 50KHz D) 100kHz
A) PWM feedback control B) negative feedback control C) Voltage-Mode Control (VMC)
A) (Pin/Pout) x 100% B) (Pout/Pin) x 100% C) Pout x Pin x 100%
A) Damping ration B) Output voltage not settling time C) Output voltage settling time
A) 1000μΗ B) 1μΗ C) 10μΗ D) 100μΗ
A) Tolerance Analysis B) Monte Carlo C) transient analysis D) AC analysis
A) Using.subckt definition B) Using . Meas command C) CAD D) Using Netlist
A) .op B) .tran C) .param D) .meas
A) SPICE compatible image format B) SPICE compatible text format C) Plain Text
A) Symbol creation with subcircuits B) Visual hierarchy C) All of the above D) Top down design
A) Minimum timestep = 100 of smallest time constant B) Maximum timestep = 1/100 of Highest time constant C) Maximum timestep = 1/100 of smallest time constant
A) min= 1-9 B) gmin=1e C) gmin = 1e-9 D) .options E) min= 1e-9
A) .TRAN B) .step C) .ic command with node voltages D) .param
A) abstol B) abstol 1e-12 C) Reltol 1e-12 D) Reltol
A) Modify gmin stepping B) Reduce increment size C) Refine the mesh D) Tighten Convergence Settings
A) File Export command from the Plot Pane B) Left-click plot, export data as text C) Right-click plot, export data as text
A) .MEAS B) Node2 C) node1 D) V(node1)-V(node2)
A) .meas tran rms RMS V(out) B) .param C) .tran D) .op
A) .AC B) .fft V(out) C) .tran D) .op
A) .MEAS P_AVG AVG V(R1)*I(R1) B) .tran C) .param D) .meas avg power = avg (V(n1)*I(R1)) E) .AC
A) Comment Text for descriptive labels and Net Name Labels/Ports B) Prefix with functional description C) Press F4 or the “label net" D) Hierarchical prefix with functional description
A) SPICE directives with comments B) using a text file to document C) Add comments D) Rename the schematic
A) Separate folders for each analysis type B) My Documents\LTspiceXVII C) Dedicated folder for each individual circuit project
A) Clarity, functionality, and portability B) ProjectName_CircuitType_Version C) .measure
A) use the .step param command B) External Version Control System (VCS) C) Sequential backup with date stamps
A) Systematic, multi-analysis comparison B) Verification vs. Validation C) Systematic node voltage checking
A) Check for syntax and units B) Error log analysis and stepping C) SPICE Error Log and the Waveform Viewer
A) Cross-Verification B) Theoretical calculation comparison
A) Progressive component addition B) Systematic process
A) Comparison with datasheet specifications B) Comparison of simulation results against unknown datasheet parameters
A) 1uF B) 100uF C) 1000uF |