A) F3 B) F1 C) F2
A) 1ΚΩ B) 220k C) 5k D) 10ΚΩ
A) 0V B) 10V C) 5V D) 1µF
A) 3 B) 1 C) 1ns D) 2ns
A) 100ms B) 20ms C) 5ms D) 10ms
A) .tran B) Pulse C) .meas D) .op
A) transient analysis B) Using cursor differences in voltage vs. time plot C) None of them
A) Exponential rise to steady state B) An exponential decay curve. C) Exponential rise
A) R-C B) C x R C) R x C D) R/C
A) 1Hz B) 5Hz C) -1Hz D) 0Hz
A) 50 B) 100 C) 120 D) 10
A) Low frequency B) 2MHz C) Highest frequency D) 1MHz
A) Frequency B) High frequency C) Bode plot D) gain
A) half of its maximum power. B) Half power point (0.707 of peak amplitude) C) Half point (0.70 of peak amplitude)
A) 12V B) 170 V peak C) 120V D) 220V
A) 100μF B) 2200µF C) 1000μF D) 10μF
A) Bridge configuration with two diodes B) Bridge configuration with four diodes C) Bridge rectifier
A) difference between the maximum and minimm voltage B) Peak-to-peak voltage measurement C) None of them
A) Input power x output power B) Input power / output power x 100% C) Output power / Input power × 100%
A) LT101 B) LT1001 C) LM1001 D) LM741
A) ±15V B) -15V C) 15V D) 5V
A) 12 B) 13 C) 10 D) 11
A) All of the above B) 2V sine wave C) 1V sine wave D) 1 V peak sine wave
A) Bandwidth B) Frequency at -3dB point from midband gain C) Frequency at 3dB point from midband gain D) Sine wave
A) 20ΚΩ B) 120Ω C) 1ΚΩ D) 10ΚΩ
A) Low Output Impedance B) CMRR C) High Input Impedance
A) 220 B) 1ΚΩ C) 120 D) 10ΚΩ
A) difference amplifier configuration B) Identical signals applied to both inputs C) Apply a common-mode signal
A) Connect the inputs B) Apply a small differential input Vd=V-V-VdV+ -V C) Output voltage / differential input voltage
A) drops by -3dB B) drops by 3dB C) 10kHz D) 1kHz
A) Sallen-Key B) Swollen-key C) VCVS filter topology
A) -90 degrees B) -120 degrees C) -90 Celsius D) 80 degrees
A) Filter order (n) or slope in dB/decade B) 4 dB/decade C) All of the above D) -40 dB/decade
A) 0.707 B) 0.770 C) 0.7777 D) 0707
A) 5V B) 15V C) 12V D) ±15V
A) 2kΩ B) 100Ω C) 1ΚΩ
A) 12V B) 120V C) 5V D) 15V
A) Power supply B) AVout/Alload C) AIIoad / AVout
A) Series sense resistor with feedback B) Parallel sense resistor with feedback C) Power supply
A) Colpitts Oscillator B) Phase-Shift Oscillator C) Wien bridge D) Clap Oscillator
A) Period and frequency B) Frequency-selective componentsi C) RC time constant
A) AGC circuit with thermistor B) Use oscilloscope to see how the output frequency changes C) Use a frequency counter D) Amplitude stabilizer
A) Use a frequency counter B) Long-term frequency drift measurement C) oscilloscope to see how the output frequency changes
A) Across the resistance B) Exponential amplitude growth to steady state C) Closed loop gain
A) 15KHz B) 1kHz C) 50KHz D) 100kHz
A) negative feedback control B) PWM feedback control C) Voltage-Mode Control (VMC)
A) (Pin/Pout) x 100% B) (Pout/Pin) x 100% C) Pout x Pin x 100%
A) Output voltage not settling time B) Output voltage settling time C) Damping ration
A) 1000μΗ B) 1μΗ C) 100μΗ D) 10μΗ
A) AC analysis B) Tolerance Analysis C) transient analysis D) Monte Carlo
A) Using . Meas command B) CAD C) Using Netlist D) Using.subckt definition
A) .tran B) .meas C) .op D) .param
A) SPICE compatible text format B) Plain Text C) SPICE compatible image format
A) Symbol creation with subcircuits B) Visual hierarchy C) All of the above D) Top down design
A) Maximum timestep = 1/100 of Highest time constant B) Maximum timestep = 1/100 of smallest time constant C) Minimum timestep = 100 of smallest time constant
A) min= 1-9 B) gmin=1e C) .options D) gmin = 1e-9 E) min= 1e-9
A) .step B) .param C) .ic command with node voltages D) .TRAN
A) Reltol B) Reltol 1e-12 C) abstol D) abstol 1e-12
A) Refine the mesh B) Tighten Convergence Settings C) Reduce increment size D) Modify gmin stepping
A) Left-click plot, export data as text B) File Export command from the Plot Pane C) Right-click plot, export data as text
A) Node2 B) node1 C) V(node1)-V(node2) D) .MEAS
A) .tran B) .op C) .param D) .meas tran rms RMS V(out)
A) .tran B) .AC C) .op D) .fft V(out)
A) .tran B) .AC C) .MEAS P_AVG AVG V(R1)*I(R1) D) .meas avg power = avg (V(n1)*I(R1)) E) .param
A) Prefix with functional description B) Hierarchical prefix with functional description C) Press F4 or the “label net" D) Comment Text for descriptive labels and Net Name Labels/Ports
A) Add comments B) Rename the schematic C) using a text file to document D) SPICE directives with comments
A) My Documents\LTspiceXVII B) Dedicated folder for each individual circuit project C) Separate folders for each analysis type
A) Clarity, functionality, and portability B) .measure C) ProjectName_CircuitType_Version
A) External Version Control System (VCS) B) use the .step param command C) Sequential backup with date stamps
A) Verification vs. Validation B) Systematic, multi-analysis comparison C) Systematic node voltage checking
A) Error log analysis and stepping B) Check for syntax and units C) SPICE Error Log and the Waveform Viewer
A) Cross-Verification B) Theoretical calculation comparison
A) Progressive component addition B) Systematic process
A) Comparison with datasheet specifications B) Comparison of simulation results against unknown datasheet parameters
A) 1000uF B) 100uF C) 1uF |