A) F2 B) F1 C) F3
A) 220k B) 10ΚΩ C) 1ΚΩ D) 5k
A) 1µF B) 0V C) 5V D) 10V
A) 3 B) 1 C) 2ns D) 1ns
A) 10ms B) 20ms C) 100ms D) 5ms
A) .meas B) Pulse C) .op D) .tran
A) transient analysis B) None of them C) Using cursor differences in voltage vs. time plot
A) An exponential decay curve. B) Exponential rise C) Exponential rise to steady state
A) R/C B) R x C C) C x R D) R-C
A) 1Hz B) 5Hz C) 0Hz D) -1Hz
A) 120 B) 100 C) 10 D) 50
A) Highest frequency B) Low frequency C) 1MHz D) 2MHz
A) Bode plot B) High frequency C) gain D) Frequency
A) Half power point (0.707 of peak amplitude) B) half of its maximum power. C) Half point (0.70 of peak amplitude)
A) 12V B) 120V C) 170 V peak D) 220V
A) 100μF B) 2200µF C) 10μF D) 1000μF
A) Bridge configuration with four diodes B) Bridge configuration with two diodes C) Bridge rectifier
A) Peak-to-peak voltage measurement B) difference between the maximum and minimm voltage C) None of them
A) Input power x output power B) Output power / Input power × 100% C) Input power / output power x 100%
A) LT1001 B) LM741 C) LT101 D) LM1001
A) -15V B) 15V C) ±15V D) 5V
A) 13 B) 12 C) 10 D) 11
A) 1 V peak sine wave B) 2V sine wave C) 1V sine wave D) All of the above
A) Bandwidth B) Frequency at -3dB point from midband gain C) Frequency at 3dB point from midband gain D) Sine wave
A) 20ΚΩ B) 10ΚΩ C) 120Ω D) 1ΚΩ
A) High Input Impedance B) CMRR C) Low Output Impedance
A) 10ΚΩ B) 120 C) 1ΚΩ D) 220
A) Apply a common-mode signal B) difference amplifier configuration C) Identical signals applied to both inputs
A) Output voltage / differential input voltage B) Apply a small differential input Vd=V-V-VdV+ -V C) Connect the inputs
A) 10kHz B) drops by -3dB C) 1kHz D) drops by 3dB
A) Sallen-Key B) VCVS filter topology C) Swollen-key
A) -90 degrees B) 80 degrees C) -90 Celsius D) -120 degrees
A) Filter order (n) or slope in dB/decade B) All of the above C) 4 dB/decade D) -40 dB/decade
A) 0.770 B) 0.707 C) 0.7777 D) 0707
A) ±15V B) 5V C) 15V D) 12V
A) 1ΚΩ B) 2kΩ C) 100Ω
A) 15V B) 5V C) 12V D) 120V
A) Power supply B) AVout/Alload C) AIIoad / AVout
A) Power supply B) Parallel sense resistor with feedback C) Series sense resistor with feedback
A) Clap Oscillator B) Phase-Shift Oscillator C) Wien bridge D) Colpitts Oscillator
A) Frequency-selective componentsi B) Period and frequency C) RC time constant
A) Amplitude stabilizer B) AGC circuit with thermistor C) Use oscilloscope to see how the output frequency changes D) Use a frequency counter
A) oscilloscope to see how the output frequency changes B) Use a frequency counter C) Long-term frequency drift measurement
A) Closed loop gain B) Across the resistance C) Exponential amplitude growth to steady state
A) 100kHz B) 1kHz C) 15KHz D) 50KHz
A) Voltage-Mode Control (VMC) B) negative feedback control C) PWM feedback control
A) (Pout/Pin) x 100% B) (Pin/Pout) x 100% C) Pout x Pin x 100%
A) Output voltage not settling time B) Output voltage settling time C) Damping ration
A) 1μΗ B) 100μΗ C) 1000μΗ D) 10μΗ
A) Tolerance Analysis B) transient analysis C) Monte Carlo D) AC analysis
A) Using . Meas command B) Using Netlist C) CAD D) Using.subckt definition
A) .param B) .meas C) .op D) .tran
A) SPICE compatible image format B) Plain Text C) SPICE compatible text format
A) All of the above B) Symbol creation with subcircuits C) Top down design D) Visual hierarchy
A) Minimum timestep = 100 of smallest time constant B) Maximum timestep = 1/100 of smallest time constant C) Maximum timestep = 1/100 of Highest time constant
A) min= 1-9 B) gmin = 1e-9 C) .options D) gmin=1e E) min= 1e-9
A) .param B) .TRAN C) .step D) .ic command with node voltages
A) abstol B) Reltol C) Reltol 1e-12 D) abstol 1e-12
A) Refine the mesh B) Modify gmin stepping C) Reduce increment size D) Tighten Convergence Settings
A) Left-click plot, export data as text B) File Export command from the Plot Pane C) Right-click plot, export data as text
A) node1 B) .MEAS C) V(node1)-V(node2) D) Node2
A) .meas tran rms RMS V(out) B) .op C) .tran D) .param
A) .fft V(out) B) .AC C) .op D) .tran
A) .param B) .meas avg power = avg (V(n1)*I(R1)) C) .MEAS P_AVG AVG V(R1)*I(R1) D) .tran E) .AC
A) Prefix with functional description B) Press F4 or the “label net" C) Comment Text for descriptive labels and Net Name Labels/Ports D) Hierarchical prefix with functional description
A) Rename the schematic B) SPICE directives with comments C) Add comments D) using a text file to document
A) My Documents\LTspiceXVII B) Dedicated folder for each individual circuit project C) Separate folders for each analysis type
A) ProjectName_CircuitType_Version B) .measure C) Clarity, functionality, and portability
A) Sequential backup with date stamps B) External Version Control System (VCS) C) use the .step param command
A) Systematic node voltage checking B) Systematic, multi-analysis comparison C) Verification vs. Validation
A) Check for syntax and units B) SPICE Error Log and the Waveform Viewer C) Error log analysis and stepping
A) Theoretical calculation comparison B) Cross-Verification
A) Systematic process B) Progressive component addition
A) Comparison of simulation results against unknown datasheet parameters B) Comparison with datasheet specifications
A) 1000uF B) 1uF C) 100uF |