A) F2 B) F1 C) F3
A) 1ΚΩ B) 220k C) 10ΚΩ D) 5k
A) 5V B) 10V C) 1µF D) 0V
A) 3 B) 1 C) 2ns D) 1ns
A) 10ms B) 20ms C) 5ms D) 100ms
A) .tran B) Pulse C) .meas D) .op
A) None of them B) Using cursor differences in voltage vs. time plot C) transient analysis
A) Exponential rise B) Exponential rise to steady state C) An exponential decay curve.
A) R-C B) C x R C) R/C D) R x C
A) 1Hz B) -1Hz C) 5Hz D) 0Hz
A) 100 B) 50 C) 10 D) 120
A) Low frequency B) 1MHz C) Highest frequency D) 2MHz
A) High frequency B) Bode plot C) gain D) Frequency
A) Half point (0.70 of peak amplitude) B) Half power point (0.707 of peak amplitude) C) half of its maximum power.
A) 120V B) 12V C) 220V D) 170 V peak
A) 100μF B) 10μF C) 1000μF D) 2200µF
A) Bridge configuration with two diodes B) Bridge rectifier C) Bridge configuration with four diodes
A) None of them B) Peak-to-peak voltage measurement C) difference between the maximum and minimm voltage
A) Output power / Input power × 100% B) Input power x output power C) Input power / output power x 100%
A) LM1001 B) LT1001 C) LM741 D) LT101
A) 5V B) 15V C) -15V D) ±15V
A) 11 B) 10 C) 13 D) 12
A) 1V sine wave B) All of the above C) 1 V peak sine wave D) 2V sine wave
A) Frequency at -3dB point from midband gain B) Frequency at 3dB point from midband gain C) Sine wave D) Bandwidth
A) 10ΚΩ B) 1ΚΩ C) 20ΚΩ D) 120Ω
A) CMRR B) High Input Impedance C) Low Output Impedance
A) 1ΚΩ B) 120 C) 220 D) 10ΚΩ
A) Apply a common-mode signal B) Identical signals applied to both inputs C) difference amplifier configuration
A) Apply a small differential input Vd=V-V-VdV+ -V B) Output voltage / differential input voltage C) Connect the inputs
A) 1kHz B) 10kHz C) drops by -3dB D) drops by 3dB
A) Swollen-key B) Sallen-Key C) VCVS filter topology
A) -90 degrees B) -120 degrees C) 80 degrees D) -90 Celsius
A) -40 dB/decade B) 4 dB/decade C) Filter order (n) or slope in dB/decade D) All of the above
A) 0.707 B) 0.770 C) 0.7777 D) 0707
A) ±15V B) 5V C) 12V D) 15V
A) 100Ω B) 1ΚΩ C) 2kΩ
A) 120V B) 12V C) 15V D) 5V
A) Power supply B) AVout/Alload C) AIIoad / AVout
A) Power supply B) Parallel sense resistor with feedback C) Series sense resistor with feedback
A) Phase-Shift Oscillator B) Colpitts Oscillator C) Clap Oscillator D) Wien bridge
A) Period and frequency B) RC time constant C) Frequency-selective componentsi
A) Use oscilloscope to see how the output frequency changes B) Use a frequency counter C) AGC circuit with thermistor D) Amplitude stabilizer
A) oscilloscope to see how the output frequency changes B) Long-term frequency drift measurement C) Use a frequency counter
A) Closed loop gain B) Across the resistance C) Exponential amplitude growth to steady state
A) 100kHz B) 50KHz C) 1kHz D) 15KHz
A) Voltage-Mode Control (VMC) B) negative feedback control C) PWM feedback control
A) (Pin/Pout) x 100% B) (Pout/Pin) x 100% C) Pout x Pin x 100%
A) Output voltage settling time B) Damping ration C) Output voltage not settling time
A) 1μΗ B) 100μΗ C) 1000μΗ D) 10μΗ
A) transient analysis B) AC analysis C) Monte Carlo D) Tolerance Analysis
A) Using . Meas command B) Using Netlist C) CAD D) Using.subckt definition
A) .meas B) .tran C) .param D) .op
A) Plain Text B) SPICE compatible image format C) SPICE compatible text format
A) Symbol creation with subcircuits B) Visual hierarchy C) Top down design D) All of the above
A) Minimum timestep = 100 of smallest time constant B) Maximum timestep = 1/100 of Highest time constant C) Maximum timestep = 1/100 of smallest time constant
A) gmin = 1e-9 B) min= 1e-9 C) gmin=1e D) min= 1-9 E) .options
A) .TRAN B) .param C) .step D) .ic command with node voltages
A) abstol B) abstol 1e-12 C) Reltol D) Reltol 1e-12
A) Reduce increment size B) Modify gmin stepping C) Tighten Convergence Settings D) Refine the mesh
A) Left-click plot, export data as text B) Right-click plot, export data as text C) File Export command from the Plot Pane
A) V(node1)-V(node2) B) node1 C) .MEAS D) Node2
A) .param B) .tran C) .meas tran rms RMS V(out) D) .op
A) .tran B) .fft V(out) C) .AC D) .op
A) .MEAS P_AVG AVG V(R1)*I(R1) B) .meas avg power = avg (V(n1)*I(R1)) C) .param D) .AC E) .tran
A) Press F4 or the “label net" B) Prefix with functional description C) Hierarchical prefix with functional description D) Comment Text for descriptive labels and Net Name Labels/Ports
A) Rename the schematic B) Add comments C) SPICE directives with comments D) using a text file to document
A) My Documents\LTspiceXVII B) Separate folders for each analysis type C) Dedicated folder for each individual circuit project
A) Clarity, functionality, and portability B) ProjectName_CircuitType_Version C) .measure
A) External Version Control System (VCS) B) Sequential backup with date stamps C) use the .step param command
A) Verification vs. Validation B) Systematic node voltage checking C) Systematic, multi-analysis comparison
A) Error log analysis and stepping B) Check for syntax and units C) SPICE Error Log and the Waveform Viewer
A) Cross-Verification B) Theoretical calculation comparison
A) Systematic process B) Progressive component addition
A) Comparison of simulation results against unknown datasheet parameters B) Comparison with datasheet specifications
A) 100uF B) 1000uF C) 1uF |