A) F3 B) F1 C) F2
A) 5k B) 1ΚΩ C) 10ΚΩ D) 220k
A) 0V B) 5V C) 10V D) 1µF
A) 2ns B) 1 C) 1ns D) 3
A) 20ms B) 10ms C) 100ms D) 5ms
A) Pulse B) .op C) .tran D) .meas
A) Using cursor differences in voltage vs. time plot B) transient analysis C) None of them
A) Exponential rise B) Exponential rise to steady state C) An exponential decay curve.
A) R-C B) C x R C) R/C D) R x C
A) 5Hz B) -1Hz C) 1Hz D) 0Hz
A) 100 B) 10 C) 50 D) 120
A) Highest frequency B) Low frequency C) 2MHz D) 1MHz
A) High frequency B) Frequency C) Bode plot D) gain
A) half of its maximum power. B) Half power point (0.707 of peak amplitude) C) Half point (0.70 of peak amplitude)
A) 12V B) 170 V peak C) 220V D) 120V
A) 2200µF B) 100μF C) 10μF D) 1000μF
A) Bridge configuration with four diodes B) Bridge configuration with two diodes C) Bridge rectifier
A) Peak-to-peak voltage measurement B) difference between the maximum and minimm voltage C) None of them
A) Input power / output power x 100% B) Input power x output power C) Output power / Input power × 100%
A) LM1001 B) LM741 C) LT1001 D) LT101
A) -15V B) ±15V C) 15V D) 5V
A) 12 B) 10 C) 11 D) 13
A) 2V sine wave B) 1 V peak sine wave C) 1V sine wave D) All of the above
A) Sine wave B) Frequency at 3dB point from midband gain C) Bandwidth D) Frequency at -3dB point from midband gain
A) 120Ω B) 10ΚΩ C) 20ΚΩ D) 1ΚΩ
A) High Input Impedance B) Low Output Impedance C) CMRR
A) 120 B) 1ΚΩ C) 220 D) 10ΚΩ
A) Apply a common-mode signal B) difference amplifier configuration C) Identical signals applied to both inputs
A) Apply a small differential input Vd=V-V-VdV+ -V B) Output voltage / differential input voltage C) Connect the inputs
A) drops by -3dB B) drops by 3dB C) 1kHz D) 10kHz
A) Swollen-key B) VCVS filter topology C) Sallen-Key
A) -90 degrees B) -120 degrees C) -90 Celsius D) 80 degrees
A) 4 dB/decade B) All of the above C) Filter order (n) or slope in dB/decade D) -40 dB/decade
A) 0.770 B) 0.707 C) 0707 D) 0.7777
A) 5V B) ±15V C) 12V D) 15V
A) 100Ω B) 1ΚΩ C) 2kΩ
A) 12V B) 5V C) 15V D) 120V
A) AIIoad / AVout B) AVout/Alload C) Power supply
A) Power supply B) Parallel sense resistor with feedback C) Series sense resistor with feedback
A) Colpitts Oscillator B) Clap Oscillator C) Phase-Shift Oscillator D) Wien bridge
A) RC time constant B) Frequency-selective componentsi C) Period and frequency
A) Use oscilloscope to see how the output frequency changes B) Amplitude stabilizer C) Use a frequency counter D) AGC circuit with thermistor
A) Use a frequency counter B) oscilloscope to see how the output frequency changes C) Long-term frequency drift measurement
A) Across the resistance B) Closed loop gain C) Exponential amplitude growth to steady state
A) 15KHz B) 50KHz C) 1kHz D) 100kHz
A) Voltage-Mode Control (VMC) B) negative feedback control C) PWM feedback control
A) (Pin/Pout) x 100% B) Pout x Pin x 100% C) (Pout/Pin) x 100%
A) Damping ration B) Output voltage settling time C) Output voltage not settling time
A) 100μΗ B) 1μΗ C) 10μΗ D) 1000μΗ
A) AC analysis B) transient analysis C) Tolerance Analysis D) Monte Carlo
A) CAD B) Using . Meas command C) Using Netlist D) Using.subckt definition
A) .op B) .param C) .meas D) .tran
A) SPICE compatible image format B) Plain Text C) SPICE compatible text format
A) All of the above B) Top down design C) Visual hierarchy D) Symbol creation with subcircuits
A) Minimum timestep = 100 of smallest time constant B) Maximum timestep = 1/100 of Highest time constant C) Maximum timestep = 1/100 of smallest time constant
A) .options B) min= 1-9 C) gmin=1e D) gmin = 1e-9 E) min= 1e-9
A) .ic command with node voltages B) .TRAN C) .step D) .param
A) abstol 1e-12 B) abstol C) Reltol 1e-12 D) Reltol
A) Reduce increment size B) Refine the mesh C) Tighten Convergence Settings D) Modify gmin stepping
A) Left-click plot, export data as text B) Right-click plot, export data as text C) File Export command from the Plot Pane
A) .MEAS B) V(node1)-V(node2) C) node1 D) Node2
A) .op B) .tran C) .param D) .meas tran rms RMS V(out)
A) .op B) .fft V(out) C) .AC D) .tran
A) .meas avg power = avg (V(n1)*I(R1)) B) .param C) .AC D) .MEAS P_AVG AVG V(R1)*I(R1) E) .tran
A) Comment Text for descriptive labels and Net Name Labels/Ports B) Prefix with functional description C) Hierarchical prefix with functional description D) Press F4 or the “label net"
A) SPICE directives with comments B) using a text file to document C) Add comments D) Rename the schematic
A) My Documents\LTspiceXVII B) Dedicated folder for each individual circuit project C) Separate folders for each analysis type
A) .measure B) ProjectName_CircuitType_Version C) Clarity, functionality, and portability
A) use the .step param command B) Sequential backup with date stamps C) External Version Control System (VCS)
A) Systematic, multi-analysis comparison B) Systematic node voltage checking C) Verification vs. Validation
A) Error log analysis and stepping B) Check for syntax and units C) SPICE Error Log and the Waveform Viewer
A) Theoretical calculation comparison B) Cross-Verification
A) Progressive component addition B) Systematic process
A) Comparison of simulation results against unknown datasheet parameters B) Comparison with datasheet specifications
A) 100uF B) 1uF C) 1000uF |