A) F2 B) F1 C) F3
A) 1ΚΩ B) 5k C) 10ΚΩ D) 220k
A) 1µF B) 0V C) 5V D) 10V
A) 2ns B) 1ns C) 1 D) 3
A) 100ms B) 10ms C) 5ms D) 20ms
A) .tran B) Pulse C) .op D) .meas
A) transient analysis B) Using cursor differences in voltage vs. time plot C) None of them
A) Exponential rise B) Exponential rise to steady state C) An exponential decay curve.
A) R/C B) R-C C) R x C D) C x R
A) 1Hz B) 0Hz C) 5Hz D) -1Hz
A) 120 B) 10 C) 50 D) 100
A) 2MHz B) Highest frequency C) 1MHz D) Low frequency
A) Bode plot B) High frequency C) gain D) Frequency
A) Half point (0.70 of peak amplitude) B) half of its maximum power. C) Half power point (0.707 of peak amplitude)
A) 170 V peak B) 12V C) 220V D) 120V
A) 2200µF B) 10μF C) 100μF D) 1000μF
A) Bridge rectifier B) Bridge configuration with four diodes C) Bridge configuration with two diodes
A) difference between the maximum and minimm voltage B) Peak-to-peak voltage measurement C) None of them
A) Input power x output power B) Input power / output power x 100% C) Output power / Input power × 100%
A) LM741 B) LM1001 C) LT101 D) LT1001
A) 5V B) -15V C) ±15V D) 15V
A) 12 B) 11 C) 13 D) 10
A) 2V sine wave B) 1V sine wave C) All of the above D) 1 V peak sine wave
A) Bandwidth B) Sine wave C) Frequency at -3dB point from midband gain D) Frequency at 3dB point from midband gain
A) 1ΚΩ B) 10ΚΩ C) 20ΚΩ D) 120Ω
A) CMRR B) High Input Impedance C) Low Output Impedance
A) 1ΚΩ B) 120 C) 10ΚΩ D) 220
A) Identical signals applied to both inputs B) difference amplifier configuration C) Apply a common-mode signal
A) Apply a small differential input Vd=V-V-VdV+ -V B) Output voltage / differential input voltage C) Connect the inputs
A) 1kHz B) 10kHz C) drops by -3dB D) drops by 3dB
A) Swollen-key B) Sallen-Key C) VCVS filter topology
A) -90 degrees B) 80 degrees C) -90 Celsius D) -120 degrees
A) All of the above B) -40 dB/decade C) 4 dB/decade D) Filter order (n) or slope in dB/decade
A) 0.707 B) 0.770 C) 0.7777 D) 0707
A) 12V B) 15V C) 5V D) ±15V
A) 2kΩ B) 1ΚΩ C) 100Ω
A) 5V B) 12V C) 15V D) 120V
A) AIIoad / AVout B) AVout/Alload C) Power supply
A) Parallel sense resistor with feedback B) Series sense resistor with feedback C) Power supply
A) Clap Oscillator B) Colpitts Oscillator C) Wien bridge D) Phase-Shift Oscillator
A) RC time constant B) Frequency-selective componentsi C) Period and frequency
A) AGC circuit with thermistor B) Amplitude stabilizer C) Use oscilloscope to see how the output frequency changes D) Use a frequency counter
A) Long-term frequency drift measurement B) Use a frequency counter C) oscilloscope to see how the output frequency changes
A) Closed loop gain B) Exponential amplitude growth to steady state C) Across the resistance
A) 100kHz B) 1kHz C) 50KHz D) 15KHz
A) negative feedback control B) Voltage-Mode Control (VMC) C) PWM feedback control
A) (Pin/Pout) x 100% B) Pout x Pin x 100% C) (Pout/Pin) x 100%
A) Output voltage not settling time B) Output voltage settling time C) Damping ration
A) 1000μΗ B) 100μΗ C) 10μΗ D) 1μΗ
A) Tolerance Analysis B) transient analysis C) AC analysis D) Monte Carlo
A) CAD B) Using Netlist C) Using.subckt definition D) Using . Meas command
A) .op B) .param C) .tran D) .meas
A) SPICE compatible image format B) Plain Text C) SPICE compatible text format
A) Top down design B) Symbol creation with subcircuits C) Visual hierarchy D) All of the above
A) Minimum timestep = 100 of smallest time constant B) Maximum timestep = 1/100 of Highest time constant C) Maximum timestep = 1/100 of smallest time constant
A) min= 1e-9 B) min= 1-9 C) .options D) gmin = 1e-9 E) gmin=1e
A) .TRAN B) .ic command with node voltages C) .param D) .step
A) abstol 1e-12 B) Reltol 1e-12 C) abstol D) Reltol
A) Tighten Convergence Settings B) Reduce increment size C) Refine the mesh D) Modify gmin stepping
A) Left-click plot, export data as text B) Right-click plot, export data as text C) File Export command from the Plot Pane
A) V(node1)-V(node2) B) .MEAS C) node1 D) Node2
A) .tran B) .param C) .op D) .meas tran rms RMS V(out)
A) .AC B) .fft V(out) C) .tran D) .op
A) .meas avg power = avg (V(n1)*I(R1)) B) .MEAS P_AVG AVG V(R1)*I(R1) C) .AC D) .tran E) .param
A) Prefix with functional description B) Hierarchical prefix with functional description C) Press F4 or the “label net" D) Comment Text for descriptive labels and Net Name Labels/Ports
A) using a text file to document B) Add comments C) SPICE directives with comments D) Rename the schematic
A) My Documents\LTspiceXVII B) Separate folders for each analysis type C) Dedicated folder for each individual circuit project
A) .measure B) ProjectName_CircuitType_Version C) Clarity, functionality, and portability
A) use the .step param command B) External Version Control System (VCS) C) Sequential backup with date stamps
A) Systematic, multi-analysis comparison B) Verification vs. Validation C) Systematic node voltage checking
A) Error log analysis and stepping B) SPICE Error Log and the Waveform Viewer C) Check for syntax and units
A) Theoretical calculation comparison B) Cross-Verification
A) Progressive component addition B) Systematic process
A) Comparison of simulation results against unknown datasheet parameters B) Comparison with datasheet specifications
A) 100uF B) 1uF C) 1000uF |