A) F1 B) F2 C) F3
A) 5k B) 10ΚΩ C) 1ΚΩ D) 220k
A) 5V B) 0V C) 1µF D) 10V
A) 1ns B) 1 C) 3 D) 2ns
A) 10ms B) 20ms C) 100ms D) 5ms
A) .meas B) .op C) Pulse D) .tran
A) None of them B) Using cursor differences in voltage vs. time plot C) transient analysis
A) Exponential rise B) An exponential decay curve. C) Exponential rise to steady state
A) R-C B) R x C C) C x R D) R/C
A) 0Hz B) 5Hz C) 1Hz D) -1Hz
A) 10 B) 100 C) 50 D) 120
A) 1MHz B) 2MHz C) Low frequency D) Highest frequency
A) gain B) Bode plot C) High frequency D) Frequency
A) Half power point (0.707 of peak amplitude) B) half of its maximum power. C) Half point (0.70 of peak amplitude)
A) 220V B) 12V C) 120V D) 170 V peak
A) 1000μF B) 2200µF C) 100μF D) 10μF
A) Bridge configuration with two diodes B) Bridge rectifier C) Bridge configuration with four diodes
A) None of them B) difference between the maximum and minimm voltage C) Peak-to-peak voltage measurement
A) Input power / output power x 100% B) Input power x output power C) Output power / Input power × 100%
A) LT101 B) LM741 C) LM1001 D) LT1001
A) ±15V B) 15V C) -15V D) 5V
A) 11 B) 10 C) 13 D) 12
A) 1 V peak sine wave B) 1V sine wave C) 2V sine wave D) All of the above
A) Bandwidth B) Frequency at 3dB point from midband gain C) Frequency at -3dB point from midband gain D) Sine wave
A) 20ΚΩ B) 10ΚΩ C) 120Ω D) 1ΚΩ
A) Low Output Impedance B) CMRR C) High Input Impedance
A) 120 B) 220 C) 1ΚΩ D) 10ΚΩ
A) Apply a common-mode signal B) Identical signals applied to both inputs C) difference amplifier configuration
A) Apply a small differential input Vd=V-V-VdV+ -V B) Output voltage / differential input voltage C) Connect the inputs
A) 10kHz B) 1kHz C) drops by -3dB D) drops by 3dB
A) VCVS filter topology B) Swollen-key C) Sallen-Key
A) -90 Celsius B) -90 degrees C) -120 degrees D) 80 degrees
A) -40 dB/decade B) 4 dB/decade C) All of the above D) Filter order (n) or slope in dB/decade
A) 0.707 B) 0.7777 C) 0.770 D) 0707
A) 15V B) 12V C) 5V D) ±15V
A) 100Ω B) 2kΩ C) 1ΚΩ
A) 15V B) 120V C) 12V D) 5V
A) AVout/Alload B) Power supply C) AIIoad / AVout
A) Parallel sense resistor with feedback B) Series sense resistor with feedback C) Power supply
A) Colpitts Oscillator B) Clap Oscillator C) Phase-Shift Oscillator D) Wien bridge
A) Frequency-selective componentsi B) RC time constant C) Period and frequency
A) Amplitude stabilizer B) AGC circuit with thermistor C) Use oscilloscope to see how the output frequency changes D) Use a frequency counter
A) oscilloscope to see how the output frequency changes B) Use a frequency counter C) Long-term frequency drift measurement
A) Closed loop gain B) Exponential amplitude growth to steady state C) Across the resistance
A) 15KHz B) 100kHz C) 1kHz D) 50KHz
A) Voltage-Mode Control (VMC) B) negative feedback control C) PWM feedback control
A) (Pin/Pout) x 100% B) Pout x Pin x 100% C) (Pout/Pin) x 100%
A) Output voltage not settling time B) Damping ration C) Output voltage settling time
A) 100μΗ B) 1000μΗ C) 1μΗ D) 10μΗ
A) Monte Carlo B) transient analysis C) AC analysis D) Tolerance Analysis
A) Using Netlist B) Using.subckt definition C) Using . Meas command D) CAD
A) .op B) .tran C) .param D) .meas
A) SPICE compatible text format B) Plain Text C) SPICE compatible image format
A) Top down design B) Symbol creation with subcircuits C) Visual hierarchy D) All of the above
A) Maximum timestep = 1/100 of smallest time constant B) Minimum timestep = 100 of smallest time constant C) Maximum timestep = 1/100 of Highest time constant
A) gmin = 1e-9 B) min= 1e-9 C) gmin=1e D) .options E) min= 1-9
A) .TRAN B) .param C) .step D) .ic command with node voltages
A) abstol B) abstol 1e-12 C) Reltol 1e-12 D) Reltol
A) Refine the mesh B) Modify gmin stepping C) Reduce increment size D) Tighten Convergence Settings
A) Right-click plot, export data as text B) File Export command from the Plot Pane C) Left-click plot, export data as text
A) V(node1)-V(node2) B) Node2 C) node1 D) .MEAS
A) .param B) .op C) .meas tran rms RMS V(out) D) .tran
A) .fft V(out) B) .op C) .tran D) .AC
A) .meas avg power = avg (V(n1)*I(R1)) B) .param C) .AC D) .MEAS P_AVG AVG V(R1)*I(R1) E) .tran
A) Press F4 or the “label net" B) Comment Text for descriptive labels and Net Name Labels/Ports C) Prefix with functional description D) Hierarchical prefix with functional description
A) using a text file to document B) Add comments C) SPICE directives with comments D) Rename the schematic
A) Separate folders for each analysis type B) Dedicated folder for each individual circuit project C) My Documents\LTspiceXVII
A) Clarity, functionality, and portability B) .measure C) ProjectName_CircuitType_Version
A) use the .step param command B) Sequential backup with date stamps C) External Version Control System (VCS)
A) Systematic, multi-analysis comparison B) Systematic node voltage checking C) Verification vs. Validation
A) Check for syntax and units B) Error log analysis and stepping C) SPICE Error Log and the Waveform Viewer
A) Cross-Verification B) Theoretical calculation comparison
A) Systematic process B) Progressive component addition
A) Comparison of simulation results against unknown datasheet parameters B) Comparison with datasheet specifications
A) 1uF B) 1000uF C) 100uF |